The non-volatile memory market is expanding appreciably pulled by the demand for mobile apparatus, typically, cell-phones. A flush memory is one of the representative non-volatile memories, and used as a PROM since its operation speed is slow. However, a high speed RAM is required as a scratch pad memory, therefore, FLASH and DRAM memories are both mounted on the mobile devices. If a device is implemented including the aspects of these two memories, the expected impact will be extremely large not only because a FLASH and a DRAM are integrated into a single chip unit, but also because the device will be able to replace all the semiconductor memories.
One of the candidates to implement the device is a non-volatile memory with phase change films, for example, disclosed in detail in U.S. Pat. No. 5,883,827. The phase change memory is sometimes called a PRAM, an OUM, or an Ovonyx memory. For this memory, storage information to be stored is written into the element with the change of the crystalline state of the element in response to the heat generated by the current through the element. Chalcogenide is used as a material for the memory element. The chalcogenide is a material to include at least one element from sulfur, selenium, and tellurium. The chemical composition of chalcogenide sometimes used is, for example, Ge2Sb2Te5.
Next, an operational principle of the phase change memory is explained briefly. In the case to cause an amorphization to a portion of chalcogenide wherein a phase is changed, the portion is heated to just above its melting point, and an electric reset pulse is applied thereto for cooling rapidly. The melting point is 600° C., for example, and the time required for the cooling is 10 nsec, for example. In the case of crystallization of the phase change portion, the temperature of the phase change portion is maintained above its crystallization and below melting point. The temperature required for this process, for example, is 400° C. The time required for crystallization depends on the composition of chalcogenide material, and 200 nsec, for example. Thereafter, the crystallization of phase change portion of the phase change memory cells is called a set operation, and its amorphization is called a reset operation.
An aspect of the phase change memory is that the resistivity of the phase change portion changes by 2 to 3 orders of magnitude depending on crystalline or non-crystalline state. Since the resistivity being high or low is read by corresponding to ‘0’ or ‘1’, larger the difference in resistivity, easier the sense operation to read, resulting in fast read. Furthermore, by applying the resistivity to ternary or even larger system, storage of multiple values also becomes possible.
The write procedure to the phase change memory in described in U.S. Pat. No. 5,883,827. And the following fact is also described in JP-A No. 65177/1975, that with the write operation a deviation in the storage material composition is caused by the drift of electrically positive elements toward the negative electrode, whereas, in contrast, negative elements toward the positive electrode. The references on the direction of the electric current pulse through the phase change element areas follows; A concept is described in U.S. Pat. No. 6,576,921, that a current flows from the upper electrode to the plug electrode in the phase change memory for information storage element with the structure that the phase change material is sandwiched between the upper electrode and the plug electrode. And another concept is described in 2003 symposium on VLST Technology pp. 173-174, digest of technical papers, that a current flows from the plug electrode to the upper electrode.